The Dynamic strain measurement system is designed on the FPGA device and Wiznet, it consists of five modules: the
strain sensors, analog input and output module, FPGA module, Wiznet module and the upper computer.
STRAIN SENSORS: Strain gauges are fairly straightforward devices that output a voltage signal based on a change in
resistance when the object to which they are attached to undergoes tension or compression.
ANALOG IO MODULE: Analog IO module performs signal conditioning and AD conversion. It consists of low-pass
and band elimination filters and data amplifier used to enhance the output voltage of a strain gauge. High speed AD
conversion chip has 8 channels forming a strain part; this strain acquisition system has four strain parts. Sampled
results are transmitted to the FPGA through SPI bus after the AD conversion.
FPGA MODULE: FPGA has high clock frequency and it’s easy to complete the complex logic control of peripheral
equipment. FPGA acts as a high speed multi channel data acquisition systems to control the ADC and other peripheral
equipments work. When high speed sampling data is uploaded directly to the Wiznet, it will be stored in FPGA which
acts as a FIFO.
WIZNET: Wiznet is a gateway module that converts RS-232 protocol into TCP/IP. It enables the remote gauging of
TCP/IP devices through RS-232 interface.
A. STRAIN SENSORS: The below figure shows the Strain gages are of the structure, in which a metallic foil film in
the thickness of a few microns is glued on a thin electrically insulated sheet (such as polyimide, polyester and so on).
B. ANALOG IO MODULE: An analog-to-digital converter (ADC) is a device that converts a continuous physical
quantity to a digital number that represents the quantity’s amplitude. An ADC may also provide an isolated
measurement such as an electronic device that converts an input analog voltage or current to a digital number
proportional to the magnitude of the voltage or current.
The ADC0808, data acquisition component is a monolithic CMOS device with an 8-bit analog-to-digital converter, 8-
channel multiplexer and microprocessor compatible control logic. The 8-bit A/D converter uses successive
approximation as the conversion technique. The converter features a high impedance chopper stabilized comparator, a
256R voltage divider with analog switch tree and a successive approximation register. The 8-channel multiplexer can
directly access any of the 8-single-ended analog signals.
C. ARTIFICAL INTELLIGENCE UNIT: Artificial Intelligence Model indicates any fault occurs from the input
sensors, we can control using AI.
D. UART DESIGN: UART provides the means to send information using a minimum number of wires. The data is sent
bit serially, without a clock signal. The main function of a UART is the conversion of parallel-to-serial when
transmitting and serial to parallel when receiving. The fact that a clock signal is not sent with the data complicates the
design of a UART. The two systems (transmitter and receiver) contain separate and unsynchronized local clocks. A
part of the function of UART .
E. WIZNET: WIZ220IO is an embedded remote I/O module which is able to control and monitor I/O port remotely via
Internet. It is possible to monitor and control I/O port by using Windows application. There are 16 digital I/O ports and
4 analog I/O supported by WIZ220IO. Additionally, the firmware and embedded webpage can also be updated
remotely through the Ethernet. WIZ220IO includes not only I/O controlling & monitoring but also I/O value
The users can control or monitor via web browser in remote host PC, and configure the module’s environment
parameters and check the IO status via Configuration Tool program provided by WIZnet. The interface of WIZ220IO
consists of analog interface and digital interface. 12 bits resolution analog I/O, 3.3V digital output and the maximum
5.5V digital input are supported by WIZ220IO. The digital I/Os are internally pulled up. The users can use Web
browser or Configuration Tool to remotely control the interfaces. The UART data output can also be displayed in the
The proposed strain measurement system contains mainly 8-bit data_in, sop, eop, valid, RX232_RD and channel as a
inputs and data_led , control outputs from artificial intelligence.
Timing Summary of proposed strain measurement system:
Speed Grade: -5
Minimum period: 10.518ns
Maximum Frequency: 95.075MHz
Minimum input arrival time before clock: 4.588ns
Maximum output required time after clock: 7.277ns
Maximum combinational path delay: 5.776ns
Figure 5 shows the simulation results of ADC Model after giving predefined input values.
Further, this system can be designed for the medical field to measure strain in the bones and joints.